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authorNicolas Ferre <nicolas.ferre@atmel.com>2013-06-24 18:07:34 +0200
committerNicolas Ferre <nicolas.ferre@atmel.com>2013-06-26 15:23:18 +0200
commitd04e5b694e996e7cbbe3748924a259a647c3456d (patch)
tree9d8844e2129b2543800aefa29053fb5395d7f61b /arch/arm/mach-at91/include/mach/at91_pmc.h
parent7319ee0495b7a0c7aee69beb580cd293d5e21ef4 (diff)
ARM: at91/PMC: fix at91sam9n12 USB FS init
at91sam9n12 has Full-speed only USB. So we should add it to the list in at91_pllb_usbfs_clock_init() function. Moreover, at91sam9n12 has an unusual PMC in the sense that it has a PLLB but also has a USB clock register. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Bo Shen <voice.shen@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91_pmc.h')
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 2bd7f51b0b82..c604cc69acb5 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -130,7 +130,10 @@ extern void __iomem *at91_pmc_base;
#define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */
#define AT91_PMC_USBS_PLLA (0 << 0)
#define AT91_PMC_USBS_UPLL (1 << 0)
+#define AT91_PMC_USBS_PLLB (1 << 0) /* [AT91SAMN12 only] */
#define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */
+#define AT91_PMC_OHCIUSBDIV_1 (0x0 << 8)
+#define AT91_PMC_OHCIUSBDIV_2 (0x1 << 8)
#define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */
#define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */