diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-02-21 21:42:50 +0000 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-02-21 21:42:50 +0000 |
commit | 22b61a11fd4e6d7a48d694ce350331bebc0394ed (patch) | |
tree | f4be46c8154f5094c248fcd9fdf644b236f591b3 /arch/arm/include | |
parent | 423145a5d4def58cff760809d48cfb21316d59a9 (diff) | |
parent | fa4e998999322bc1b11d2c8b19b9fa2016fd1548 (diff) |
Merge branch 'dma' into devel
Conflicts:
arch/arm/plat-mxc/dma-mx1-mx2.c
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/dma.h | 46 | ||||
-rw-r--r-- | arch/arm/include/asm/mach/dma.h | 35 |
2 files changed, 37 insertions, 44 deletions
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h index df5638f3643a..7edf3536df24 100644 --- a/arch/arm/include/asm/dma.h +++ b/arch/arm/include/asm/dma.h @@ -19,21 +19,17 @@ #include <asm/system.h> #include <asm/scatterlist.h> -typedef unsigned int dmach_t; - #include <mach/isa-dma.h> /* - * DMA modes + * The DMA modes reflect the settings for the ISA DMA controller */ -typedef unsigned int dmamode_t; - -#define DMA_MODE_MASK 3 +#define DMA_MODE_MASK 0xcc -#define DMA_MODE_READ 0 -#define DMA_MODE_WRITE 1 -#define DMA_MODE_CASCADE 2 -#define DMA_AUTOINIT 4 +#define DMA_MODE_READ 0x44 +#define DMA_MODE_WRITE 0x48 +#define DMA_MODE_CASCADE 0xc0 +#define DMA_AUTOINIT 0x10 extern spinlock_t dma_spin_lock; @@ -52,44 +48,44 @@ static inline void release_dma_lock(unsigned long flags) /* Clear the 'DMA Pointer Flip Flop'. * Write 0 for LSB/MSB, 1 for MSB/LSB access. */ -#define clear_dma_ff(channel) +#define clear_dma_ff(chan) /* Set only the page register bits of the transfer address. * * NOTE: This is an architecture specific function, and should * be hidden from the drivers */ -extern void set_dma_page(dmach_t channel, char pagenr); +extern void set_dma_page(unsigned int chan, char pagenr); /* Request a DMA channel * * Some architectures may need to do allocate an interrupt */ -extern int request_dma(dmach_t channel, const char * device_id); +extern int request_dma(unsigned int chan, const char * device_id); /* Free a DMA channel * * Some architectures may need to do free an interrupt */ -extern void free_dma(dmach_t channel); +extern void free_dma(unsigned int chan); /* Enable DMA for this channel * * On some architectures, this may have other side effects like * enabling an interrupt and setting the DMA registers. */ -extern void enable_dma(dmach_t channel); +extern void enable_dma(unsigned int chan); /* Disable DMA for this channel * * On some architectures, this may have other side effects like * disabling an interrupt or whatever. */ -extern void disable_dma(dmach_t channel); +extern void disable_dma(unsigned int chan); /* Test whether the specified channel has an active DMA transfer */ -extern int dma_channel_active(dmach_t channel); +extern int dma_channel_active(unsigned int chan); /* Set the DMA scatter gather list for this channel * @@ -97,7 +93,7 @@ extern int dma_channel_active(dmach_t channel); * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ -extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); +extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); /* Set the DMA address for this channel * @@ -105,9 +101,9 @@ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ -extern void __set_dma_addr(dmach_t channel, void *addr); -#define set_dma_addr(channel, addr) \ - __set_dma_addr(channel, bus_to_virt(addr)) +extern void __set_dma_addr(unsigned int chan, void *addr); +#define set_dma_addr(chan, addr) \ + __set_dma_addr(chan, bus_to_virt(addr)) /* Set the DMA byte count for this channel * @@ -115,7 +111,7 @@ extern void __set_dma_addr(dmach_t channel, void *addr); * especially since some DMA architectures don't update the * DMA count immediately, but defer it to the enable_dma(). */ -extern void set_dma_count(dmach_t channel, unsigned long count); +extern void set_dma_count(unsigned int chan, unsigned long count); /* Set the transfer direction for this channel * @@ -124,11 +120,11 @@ extern void set_dma_count(dmach_t channel, unsigned long count); * DMA transfer direction immediately, but defer it to the * enable_dma(). */ -extern void set_dma_mode(dmach_t channel, dmamode_t mode); +extern void set_dma_mode(unsigned int chan, unsigned int mode); /* Set the transfer speed for this channel */ -extern void set_dma_speed(dmach_t channel, int cycle_ns); +extern void set_dma_speed(unsigned int chan, int cycle_ns); /* Get DMA residue count. After a DMA transfer, this * should return zero. Reading this while a DMA transfer is @@ -136,7 +132,7 @@ extern void set_dma_speed(dmach_t channel, int cycle_ns); * If called before the channel has been used, it may return 1. * Otherwise, it returns the number of _bytes_ left to transfer. */ -extern int get_dma_residue(dmach_t channel); +extern int get_dma_residue(unsigned int chan); #ifndef NO_DMA #define NO_DMA 255 diff --git a/arch/arm/include/asm/mach/dma.h b/arch/arm/include/asm/mach/dma.h index fc7278ea7146..9e614a18e680 100644 --- a/arch/arm/include/asm/mach/dma.h +++ b/arch/arm/include/asm/mach/dma.h @@ -15,13 +15,13 @@ struct dma_struct; typedef struct dma_struct dma_t; struct dma_ops { - int (*request)(dmach_t, dma_t *); /* optional */ - void (*free)(dmach_t, dma_t *); /* optional */ - void (*enable)(dmach_t, dma_t *); /* mandatory */ - void (*disable)(dmach_t, dma_t *); /* mandatory */ - int (*residue)(dmach_t, dma_t *); /* optional */ - int (*setspeed)(dmach_t, dma_t *, int); /* optional */ - char *type; + int (*request)(unsigned int, dma_t *); /* optional */ + void (*free)(unsigned int, dma_t *); /* optional */ + void (*enable)(unsigned int, dma_t *); /* mandatory */ + void (*disable)(unsigned int, dma_t *); /* mandatory */ + int (*residue)(unsigned int, dma_t *); /* optional */ + int (*setspeed)(unsigned int, dma_t *, int); /* optional */ + const char *type; }; struct dma_struct { @@ -34,24 +34,21 @@ struct dma_struct { unsigned int active:1; /* Transfer active */ unsigned int invalid:1; /* Address/Count changed */ - dmamode_t dma_mode; /* DMA mode */ + unsigned int dma_mode; /* DMA mode */ int speed; /* DMA speed */ unsigned int lock; /* Device is allocated */ const char *device_id; /* Device name */ - unsigned int dma_base; /* Controller base address */ - int dma_irq; /* Controller IRQ */ - struct scatterlist cur_sg; /* Current controller buffer */ - unsigned int state; - - struct dma_ops *d_ops; + const struct dma_ops *d_ops; }; -/* Prototype: void arch_dma_init(dma) - * Purpose : Initialise architecture specific DMA - * Params : dma - pointer to array of DMA structures +/* + * isa_dma_add - add an ISA-style DMA channel */ -extern void arch_dma_init(dma_t *dma); +extern int isa_dma_add(unsigned int, dma_t *dma); -extern void isa_init_dma(dma_t *dma); +/* + * Add the ISA DMA controller. Always takes channels 0-7. + */ +extern void isa_init_dma(void); |