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authorFlorian Fainelli <f.fainelli@gmail.com>2020-02-18 16:12:21 -0800
committerFlorian Fainelli <f.fainelli@gmail.com>2020-08-17 09:20:34 -0700
commit6b84ca265fe5fb15863202544ccff8090a1b4425 (patch)
treecbd8a2e3457f0122a593a1492d7c2f84596f3269 /arch/arm/include/debug/brcmstb.S
parent9123e3a74ec7b934a4a099e98af6a61c2f80bbf5 (diff)
ARM: brcmstb: Add debug UART entry for 72614
72164 has the same memory map as 7278 and the same physical address for the UART, alias the definition accordingly. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/include/debug/brcmstb.S')
-rw-r--r--arch/arm/include/debug/brcmstb.S24
1 files changed, 13 insertions, 11 deletions
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index 132a20c4a676..79223209d3f4 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -32,6 +32,7 @@
#define UARTA_7271 UARTA_7268
#define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000)
#define UARTA_7216 UARTA_7278
+#define UARTA_72164 UARTA_7278
#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
#define UARTA_7366 UARTA_7364
#define UARTA_74371 REG_PHYS_ADDR(0x406b00)
@@ -84,17 +85,18 @@ ARM_BE8( rev \rv, \rv )
/* Chip specific detection starts here */
20: checkuart(\rp, \rv, 0x33900000, 3390)
21: checkuart(\rp, \rv, 0x72160000, 7216)
-22: checkuart(\rp, \rv, 0x72500000, 7250)
-23: checkuart(\rp, \rv, 0x72550000, 7255)
-24: checkuart(\rp, \rv, 0x72600000, 7260)
-25: checkuart(\rp, \rv, 0x72680000, 7268)
-26: checkuart(\rp, \rv, 0x72710000, 7271)
-27: checkuart(\rp, \rv, 0x72780000, 7278)
-28: checkuart(\rp, \rv, 0x73640000, 7364)
-29: checkuart(\rp, \rv, 0x73660000, 7366)
-30: checkuart(\rp, \rv, 0x07437100, 74371)
-31: checkuart(\rp, \rv, 0x74390000, 7439)
-32: checkuart(\rp, \rv, 0x74450000, 7445)
+22: checkuart(\rp, \rv, 0x07216400, 72164)
+23: checkuart(\rp, \rv, 0x72500000, 7250)
+24: checkuart(\rp, \rv, 0x72550000, 7255)
+25: checkuart(\rp, \rv, 0x72600000, 7260)
+26: checkuart(\rp, \rv, 0x72680000, 7268)
+27: checkuart(\rp, \rv, 0x72710000, 7271)
+28: checkuart(\rp, \rv, 0x72780000, 7278)
+29: checkuart(\rp, \rv, 0x73640000, 7364)
+30: checkuart(\rp, \rv, 0x73660000, 7366)
+31: checkuart(\rp, \rv, 0x07437100, 74371)
+32: checkuart(\rp, \rv, 0x74390000, 7439)
+33: checkuart(\rp, \rv, 0x74450000, 7445)
/* No valid UART found */
90: mov \rp, #0