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authorChristian Daudt <csd@broadcom.com>2013-05-09 22:21:01 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-05-15 19:39:27 +0100
commit3b656fed6ff65d6d268da9ed0760c2a58d125771 (patch)
tree17ec053049fedb78e072fbafd055e8ba712422b2 /arch/arm/include/asm/io.h
parentfaefd550c45d8d314e8f260f21565320355c947f (diff)
ARM: 7716/1: bcm281xx: Add L2 support for Rev A2 chips
Rev A2 SoCs have an unorthodox memory re-mapping and this needs to be reflected in the cache operations. This patch adds new outer cache functions for the l2x0 driver to support this SoC revision. It also adds a new compatible value for the cache to enable this functionality. Updates from V1: - remove section 1 altogether and note that in comments - simplify section selection caused by section 1 removal - BUG_ON just in case section 1 shows up Signed-off-by: Christian Daudt <csd@broadcom.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/io.h')
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