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| author | Simon Arlott <simon@fire.lp0.eu> | 2007-05-11 20:40:30 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-20 20:10:32 +0100 |
| commit | 6cbdc8c5357276307a77deeada3f04626ff17da6 (patch) | |
| tree | e0a4190d816fa4efb6ddb331b859bf0d5eb9c1a3 /arch/arm/common/gic.c | |
| parent | fc432e1952a3899ce35e84b417e5d60f74cb901b (diff) | |
[ARM] spelling fixes
Spelling fixes in arch/arm/.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/common/gic.c')
| -rw-r--r-- | arch/arm/common/gic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 2ae0bd1c907d..0c89bd35e06f 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -72,7 +72,7 @@ static inline unsigned int gic_irq(unsigned int irq) * unmask it, in the same way we need to unmask an interrupt when * we first enable it. * - * The GIC has a seperate notion of "end of interrupt" to re-enable + * The GIC has a separate notion of "end of interrupt" to re-enable * an interrupt after handling, in order to support hardware * prioritisation. * |