summaryrefslogtreecommitdiff
path: root/arch/arm/boot
diff options
context:
space:
mode:
authorFabio Estevam <fabio.estevam@freescale.com>2014-05-14 16:53:55 -0300
committerShawn Guo <shawn.guo@freescale.com>2014-07-18 16:49:31 +0800
commitf3c723801cb7bf4b19bf5e155246bfd68c4c618f (patch)
tree85243a2c914f8afca6190c30101bbb850b8d1fe6 /arch/arm/boot
parentd8cae888aa2bc0fe0905fd24d859bad8ce77aaec (diff)
ARM: dts: imx6qdl-sabresd: Configure the ECSPI1 chip select pin
GPIO4_9 is used as ECSPI1 chip select and it needs to be configured as GPIO. Configure the pin functionality explicitly in the dts file instead of relying on the fact that it comes configured as GPIO from POR or from the bootloader. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 40ea36534643..e44619218bab 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -340,6 +340,7 @@
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
+ MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
>;
};