diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-01-19 10:09:23 +0100 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2017-01-29 09:53:08 +0800 |
commit | ccc59b0c18e9935a84710d43c1a2b31635caa564 (patch) | |
tree | ba82c9c93644dd09b9b54919281492e67d14155b /arch/arm/boot | |
parent | 9a20aa2677fd4858ccda0059dfbda354bda90070 (diff) |
ARM: dts: imx7d-cl-som: Fix OTG power pinctrl
GPIO01_IO05 is controlled by the LPSR iomux controller, so attach
the corresponding pin to this controller.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts index 58b09bf1ba2d..1135bc99b3e7 100644 --- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts +++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts @@ -261,12 +261,6 @@ >; }; - pinctrl_usbotg1: usbotg1grp { - fsl,pins = < - MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14 /* OTG PWREN */ - >; - }; - pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x59 @@ -283,3 +277,11 @@ >; }; }; + +&iomuxc_lpsr { + pinctrl_usbotg1: usbotg1grp { + fsl,pins = < + MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14 /* OTG PWREN */ + >; + }; +};
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