diff options
author | Daniel Palmer <daniel@0x0f.com> | 2020-12-01 22:43:24 +0900 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2020-12-09 17:45:39 +0100 |
commit | ba2290b1b7505b28912092a0976e071a447ee18c (patch) | |
tree | d41e71f2909d8c9f9ff17fa57b8f1962d8b9185c /arch/arm/boot | |
parent | 8c50a8b359c4f262a05ed5fb05373177d11bd20c (diff) |
ARM: mstar: Add infinity2m support
The infinity2m series of chips are like the other Mstar/Sigmastar
chips in that they have a Cortex A7 system with DDR memory integrated
in a single package.
The infinity2m chips are intended for recording the incoming streams
from IP cameras. So instead of video encoders they have video decoders,
instead of a camera interface they have display hardware and so on.
Aside from the above points the big difference about these chips is that
they include a second Cortex A7 core.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201201134330.3037007-5-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/mstar-infinity2m.dtsi | 15 | ||||
-rw-r--r-- | arch/arm/boot/dts/mstar-v7.dtsi | 2 |
2 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/mstar-infinity2m.dtsi b/arch/arm/boot/dts/mstar-infinity2m.dtsi new file mode 100644 index 000000000000..02adb9fe9d3c --- /dev/null +++ b/arch/arm/boot/dts/mstar-infinity2m.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2020 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +#include "mstar-infinity.dtsi" + +&cpus { + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + }; +}; diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index 81369bc07f78..b0a21b0b731f 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -12,7 +12,7 @@ #size-cells = <1>; interrupt-parent = <&gic>; - cpus { + cpus: cpus { #address-cells = <1>; #size-cells = <0>; |