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authorArnd Bergmann <arnd@arndb.de>2017-08-22 15:31:38 +0200
committerArnd Bergmann <arnd@arndb.de>2017-08-22 15:31:38 +0200
commit840fa4a080a5367c0e2999bebf4fcc0923eab1f7 (patch)
treeaa51f410fcf44ff56781d48fb7bb92e4981f65a3 /arch/arm/boot
parenta435adbec264dc1e0d0f4df736bf35f18b8d7c02 (diff)
parent21ad06cc9e6399f64447ab316d92142bff7a17dd (diff)
Merge tag 'zynq-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx into next/dt
Pull "arm: Xilinx Zynq DT fixes for v4.14" from Michal Simek: - Remove earlycon - Use C pre-processor - Add fpga full region - Add ethernet-phy as device-type - Add adv7511 nodes to zc70x * tag 'zynq-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx: arm: zynq: Remove earlycon from bootargs arm: zynq: Use C pre-processor for includes in dts arm: zynq: Label whole PL part as fpga_full region arm: zynq: Add device-type property for zynq ethernet phy nodes arm: zynq: Add adv7511 on i2c bus for zc70x
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi8
-rw-r--r--arch/arm/boot/dts/zynq-parallella.dts3
-rw-r--r--arch/arm/boot/dts/zynq-zc702.dts20
-rw-r--r--arch/arm/boot/dts/zynq-zc706.dts20
-rw-r--r--arch/arm/boot/dts/zynq-zed.dts5
-rw-r--r--arch/arm/boot/dts/zynq-zybo.dts5
6 files changed, 52 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index f3ac9bfe580e..0f79fe1ccd9d 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -42,6 +42,14 @@
};
};
+ fpga_full: fpga-full {
+ compatible = "fpga-region";
+ fpga-mgr = <&devcfg>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+
pmu@f8891000 {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 5 4>, <0 6 4>;
diff --git a/arch/arm/boot/dts/zynq-parallella.dts b/arch/arm/boot/dts/zynq-parallella.dts
index 64a6390fc501..0144acfa9793 100644
--- a/arch/arm/boot/dts/zynq-parallella.dts
+++ b/arch/arm/boot/dts/zynq-parallella.dts
@@ -34,7 +34,7 @@
};
chosen {
- bootargs = "earlycon root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait";
+ bootargs = "root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait";
stdout-path = "serial0:115200n8";
};
};
@@ -54,6 +54,7 @@
compatible = "ethernet-phy-id0141.0e90",
"ethernet-phy-ieee802.3-c22";
reg = <0>;
+ device_type = "ethernet-phy";
marvell,reg-init = <0x3 0x10 0xff00 0x1e>,
<0x3 0x11 0xfff0 0xa>;
};
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index 0cdad2cc8b78..34e8277fce0d 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -12,7 +12,7 @@
* GNU General Public License for more details.
*/
/dts-v1/;
-/include/ "zynq-7000.dtsi"
+#include "zynq-7000.dtsi"
/ {
model = "Zynq ZC702 Development Board";
@@ -30,7 +30,7 @@
};
chosen {
- bootargs = "earlycon";
+ bootargs = "";
stdout-path = "serial0:115200n8";
};
@@ -97,6 +97,7 @@
ethernet_phy: ethernet-phy@7 {
reg = <7>;
+ device_type = "ethernet-phy";
};
};
@@ -131,6 +132,21 @@
};
};
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ adv7511: hdmi-tx@39 {
+ compatible = "adi,adv7511";
+ reg = <0x39>;
+ adi,input-depth = <8>;
+ adi,input-colorspace = "yuv422";
+ adi,input-clock = "1x";
+ adi,input-style = <3>;
+ adi,input-justification = "right";
+ };
+ };
+
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index ad4bb06dba25..7ebc8c5ae39d 100644
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -12,7 +12,7 @@
* GNU General Public License for more details.
*/
/dts-v1/;
-/include/ "zynq-7000.dtsi"
+#include "zynq-7000.dtsi"
/ {
model = "Zynq ZC706 Development Board";
@@ -30,7 +30,7 @@
};
chosen {
- bootargs = "earlycon";
+ bootargs = "";
stdout-path = "serial0:115200n8";
};
@@ -53,6 +53,7 @@
ethernet_phy: ethernet-phy@7 {
reg = <7>;
+ device_type = "ethernet-phy";
};
};
@@ -87,6 +88,21 @@
};
};
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ adv7511: hdmi-tx@39 {
+ compatible = "adi,adv7511";
+ reg = <0x39>;
+ adi,input-depth = <8>;
+ adi,input-colorspace = "yuv422";
+ adi,input-clock = "1x";
+ adi,input-style = <3>;
+ adi,input-justification = "evenly";
+ };
+ };
+
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts
index 325379f7983c..5e44dc12fd60 100644
--- a/arch/arm/boot/dts/zynq-zed.dts
+++ b/arch/arm/boot/dts/zynq-zed.dts
@@ -12,7 +12,7 @@
* GNU General Public License for more details.
*/
/dts-v1/;
-/include/ "zynq-7000.dtsi"
+#include "zynq-7000.dtsi"
/ {
model = "Zynq Zed Development Board";
@@ -29,7 +29,7 @@
};
chosen {
- bootargs = "earlycon";
+ bootargs = "";
stdout-path = "serial0:115200n8";
};
@@ -50,6 +50,7 @@
ethernet_phy: ethernet-phy@0 {
reg = <0>;
+ device_type = "ethernet-phy";
};
};
diff --git a/arch/arm/boot/dts/zynq-zybo.dts b/arch/arm/boot/dts/zynq-zybo.dts
index 590ec24b8749..e40cafc5ee5b 100644
--- a/arch/arm/boot/dts/zynq-zybo.dts
+++ b/arch/arm/boot/dts/zynq-zybo.dts
@@ -12,7 +12,7 @@
* GNU General Public License for more details.
*/
/dts-v1/;
-/include/ "zynq-7000.dtsi"
+#include "zynq-7000.dtsi"
/ {
model = "Zynq ZYBO Development Board";
@@ -29,7 +29,7 @@
};
chosen {
- bootargs = "earlycon";
+ bootargs = "";
stdout-path = "serial0:115200n8";
};
@@ -51,6 +51,7 @@
ethernet_phy: ethernet-phy@0 {
reg = <0>;
+ device_type = "ethernet-phy";
};
};