diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2014-05-27 10:03:39 +0200 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2014-05-27 10:06:05 +0200 |
commit | 331b483f42fb4d04d52ce920ae10a71411c859a4 (patch) | |
tree | 1f6399d3dc5a6a93b54b01bc2bb46b5f26c7dbab /arch/arm/boot/dts | |
parent | 309179fabddd074f7da63c5602bc32cb6de677f9 (diff) | |
parent | 2529c3a330797000d699d70c9a65b8525c6652de (diff) |
Merge branch 'clockevents/3.16' of git://git.linaro.org/people/daniel.lezcano/linux into timers/core
This pull request contains the following changes:
* Laurent Pinchart did a lot of modifications to prepare the DT
support. These modifications include a lot of cleanup (structure
renaming, preparation to support multiple channel, kzalloc usage,
...) and then finishes to drop the old code to the new one.
* Jingoo Han removed the dev_err when an allocation fails because this
error is already given by the mm subsystems.
* Matthew Leach added the ARM global timer with vexpress, enabled the
ARM global timer with the A5 and added the definition in the DT. He
also fixed a invalid check when looking for an usable ARM global
timer for A9
* Maxime Ripard added the support for AllWinner A31 for sun4i and made
the timer reset optional through the DT
* Stephen Boyd used the msm timer for the udelay
* Uwe Kleine-König fixed the non-standard 'compatible' binding for efm32
* Xiubo Li clarified the types for the clocksource_mmio_read* and
added a new Flextimer Module (FTM) with its bindings
* Yang Wei added the 'notrace' attribute to 'read_sched_clock' for the
dw_apb_timer
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 11 | ||||
-rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/vf610.dtsi | 13 |
3 files changed, 33 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index d45efa74827c..8cee8a15b90b 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -428,6 +428,17 @@ status = "disabled"; }; + timer@01c60000 { + compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer"; + reg = <0x01c60000 0x1000>; + interrupts = <0 51 4>, + <0 52 4>, + <0 53 4>, + <0 54 4>; + clocks = <&ahb1_gates 19>; + resets = <&ahb1_rst 19>; + }; + spi0: spi@01c68000 { compatible = "allwinner,sun6i-a31-spi"; reg = <0x01c68000 0x1000>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts index c544a5504591..d2709b73316b 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts @@ -88,6 +88,14 @@ interrupts = <1 13 0x304>; }; + timer@2c000200 { + compatible = "arm,cortex-a5-global-timer", + "arm,cortex-a9-global-timer"; + reg = <0x2c000200 0x20>; + interrupts = <1 11 0x304>; + clocks = <&oscclk0>; + }; + watchdog@2c000620 { compatible = "arm,cortex-a5-twd-wdt"; reg = <0x2c000620 0x20>; @@ -120,7 +128,7 @@ compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - osc@0 { + oscclk0: osc@0 { /* CPU and internal AXI reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 0>; diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi index b8ce0aa7b157..3c91b84066a1 100644 --- a/arch/arm/boot/dts/vf610.dtsi +++ b/arch/arm/boot/dts/vf610.dtsi @@ -347,6 +347,19 @@ status = "disabled"; }; + ftm: ftm@400b8000 { + compatible = "fsl,ftm-timer"; + reg = <0x400b8000 0x1000 0x400b9000 0x1000>; + interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "ftm-evt", "ftm-src", + "ftm-evt-counter-en", "ftm-src-counter-en"; + clocks = <&clks VF610_CLK_FTM2>, + <&clks VF610_CLK_FTM3>, + <&clks VF610_CLK_FTM2_EXT_FIX_EN>, + <&clks VF610_CLK_FTM3_EXT_FIX_EN>; + status = "disabled"; + }; + fec0: ethernet@400d0000 { compatible = "fsl,mvf600-fec"; reg = <0x400d0000 0x1000>; |