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authorStephen Warren <swarren@nvidia.com>2013-08-05 16:10:02 -0700
committerStephen Warren <swarren@nvidia.com>2013-10-15 09:25:28 -0600
commit0a9375d129d4367883a9914c04cecbd31df1361a (patch)
treeb54014910dee91eaa585b642523937d23a1698eb /arch/arm/boot/dts/tegra124.dtsi
parent6ec1d127eeeb7943106daf4ec69b612fff93df74 (diff)
ARM: tegra: add GPIO controller to tegra124.dtsi
The Tegra124 GPIO controller is identical to Tegra30, so copy the DT node from tegra30.dtsi to tegra124.dtsi. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra124.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index f8242488de53..b7413004ee77 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -1,3 +1,4 @@
+#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
@@ -29,6 +30,23 @@
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
};
+ gpio: gpio@6000d000 {
+ compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
+ reg = <0x6000d000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
/*
* There are two serial driver i.e. 8250 based simple serial
* driver and APB DMA based serial driver for higher baudrate