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authorVishnu Patekar <vishnupatekar0510@gmail.com>2016-01-17 00:24:55 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-01-25 00:01:21 +0100
commit85c19acf578243b7f9d349cb4e24e113661e9990 (patch)
tree16b579a7163e417f3101f58c530a0ea9d53774aa /arch/arm/boot/dts/sun8i-a83t.dtsi
parentb9c34584d74606731eb2c7131f179a96f8194700 (diff)
ARM: dts: sun8i: Enable timer node for A83T
A83T timer is compatible with that of earlier SOCs. Just add timer node to enable and re-use it. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-a83t.dtsi')
-rw-r--r--arch/arm/boot/dts/sun8i-a83t.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index bad5df7175b4..08df5598df9c 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -174,6 +174,14 @@
};
};
+ timer@01c20c00 {
+ compatible = "allwinner,sun4i-a10-timer";
+ reg = <0x01c20c00 0xa0>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>;
+ };
+
uart0: serial@01c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;