diff options
author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-08-31 14:58:20 +0200 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-09-10 11:50:41 +0200 |
commit | 2c89ce4f4b19561218c1acb97172bd7ba1a6ddc2 (patch) | |
tree | d4d669ae82d36614ca762f6e6b0c6756193c9460 /arch/arm/boot/dts/sun8i-a23.dtsi | |
parent | 78a9f0dbcd6015cdd1114dc7d78554fd5bb28010 (diff) |
ARM: sun8i: Convert the A23 and A33 to the CCU
Now that we have support for the CCU driver in sunxi-ng, convert the A23
and A33 DTs to that driver.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-a23.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun8i-a23.dtsi | 51 |
1 files changed, 10 insertions, 41 deletions
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi index 92e6616979ea..a915feb3a494 100644 --- a/arch/arm/boot/dts/sun8i-a23.dtsi +++ b/arch/arm/boot/dts/sun8i-a23.dtsi @@ -49,47 +49,12 @@ reg = <0x40000000 0x40000000>; }; - clocks { - ahb1_gates: clk@01c20060 { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a23-ahb1-gates-clk"; - reg = <0x01c20060 0x8>; - clocks = <&ahb1>; - clock-indices = <1>, <6>, - <8>, <9>, <10>, - <13>, <14>, - <19>, <20>, - <21>, <24>, <26>, - <29>, <32>, <36>, - <40>, <44>, <46>, - <52>, <53>, - <54>, <57>; - clock-output-names = "ahb1_mipidsi", "ahb1_dma", - "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", - "ahb1_nand", "ahb1_sdram", - "ahb1_hstimer", "ahb1_spi0", - "ahb1_spi1", "ahb1_otg", "ahb1_ehci", - "ahb1_ohci", "ahb1_ve", "ahb1_lcd", - "ahb1_csi", "ahb1_be", "ahb1_fe", - "ahb1_gpu", "ahb1_msgbox", - "ahb1_spinlock", "ahb1_drc"; - }; - - mbus_clk: clk@01c2015c { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-mbus-clk"; - reg = <0x01c2015c 0x4>; - clocks = <&osc24M>, <&pll6 1>, <&pll5>; - clock-output-names = "mbus"; - }; - }; - soc@01c00000 { usb_otg: usb@01c19000 { compatible = "allwinner,sun6i-a31-musb"; reg = <0x01c19000 0x0400>; - clocks = <&ahb1_gates 24>; - resets = <&ahb1_rst 24>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "mc"; phys = <&usbphy 0>; @@ -104,12 +69,12 @@ <0x01c1a800 0x4>; reg-names = "phy_ctrl", "pmu1"; - clocks = <&usb_clk 8>, - <&usb_clk 9>; + clocks = <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>; clock-names = "usb0_phy", "usb1_phy"; - resets = <&usb_clk 0>, - <&usb_clk 1>; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; reset-names = "usb0_reset", "usb1_reset"; status = "disabled"; @@ -118,6 +83,10 @@ }; }; +&ccu { + compatible = "allwinner,sun8i-a23-ccu"; +}; + &pio { compatible = "allwinner,sun8i-a23-pinctrl"; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, |