summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/sun7i-a20.dtsi
diff options
context:
space:
mode:
authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-07-24 23:46:11 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-22 00:19:17 +0200
commit17eac031b7cad5eff7610639041967d06aa1e553 (patch)
tree63fcd99b5c97079d63a507cbf2f8e4ca8706685b /arch/arm/boot/dts/sun7i-a20.dtsi
parent69fb3c047e720a317757f54be08679ab7caeaf91 (diff)
ARM: sun7i: Add the PIO controller node to the DTSI
The PIO controller is responsible for the GPIO/muxing/external interrupts handling. Now that we have support for the A20 pin set in the pinctrl driver, we can start using it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 33391517118c..980ec7522fa8 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -61,6 +61,18 @@
#size-cells = <1>;
ranges;
+ pio: pinctrl@01c20800 {
+ compatible = "allwinner,sun7i-a20-pinctrl";
+ reg = <0x01c20800 0x400>;
+ interrupts = <0 28 1>;
+ clocks = <&osc24M>;
+ gpio-controller;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #gpio-cells = <3>;
+ };
+
timer@01c20c00 {
compatible = "allwinner,sun4i-timer";
reg = <0x01c20c00 0x90>;