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authorEmilio López <emilio@elopez.com.ar>2013-07-07 18:31:57 -0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-07-15 09:58:33 +0200
commitca3d4ed5914b7e367a9079ce765bbe26332eb780 (patch)
tree90edf6e43f89788a49667143981018fe10c0d600 /arch/arm/boot/dts/sun5i-a10s.dtsi
parent170ab436bff98f765ce365532d780d07aa1a576d (diff)
ARM: sun5i: dt: Add I2C controller nodes to the A10S dtsi
Allwinner A10S has 3 I2C controllers embedded on it. Add them to the corresponding dtsi. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a10s.dtsi')
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 7c9f88f701bc..0f0881a7ac8e 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -303,5 +303,38 @@
clocks = <&apb1_gates 19>;
status = "disabled";
};
+
+ i2c0: i2c@01c2ac00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <7>;
+ clocks = <&apb1_gates 0>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@01c2b000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2b000 0x400>;
+ interrupts = <8>;
+ clocks = <&apb1_gates 1>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@01c2b400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2b400 0x400>;
+ interrupts = <9>;
+ clocks = <&apb1_gates 2>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
};
};