diff options
author | Srinivas Kandagatla <srinivas.kandagatla@st.com> | 2013-06-25 12:15:23 +0100 |
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committer | Olof Johansson <olof@lixom.net> | 2013-06-25 13:26:58 -0700 |
commit | 15969b457734feb46cc813745b039cf4ae9089ff (patch) | |
tree | 6810ed1da06abedadb9189798660643a4b76d77c /arch/arm/boot/dts/stih416-clock.dtsi | |
parent | 65ebcc1158891c8c0abef726d59a7840454ad25d (diff) |
ARM: sti: Add STiH416 SOC support
The STiH416 is advanced HD AVC processor with 3D graphics acceleration
and 1.2-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/stih416-clock.dtsi')
-rw-r--r-- | arch/arm/boot/dts/stih416-clock.dtsi | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih416-clock.dtsi b/arch/arm/boot/dts/stih416-clock.dtsi new file mode 100644 index 000000000000..7026bf1158d8 --- /dev/null +++ b/arch/arm/boot/dts/stih416-clock.dtsi @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2013 STMicroelectronics R&D Limited + * <stlinux-devel@stlinux.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/ { + clocks { + /* + * Fixed 30MHz oscillator inputs to SoC + */ + CLK_SYSIN: CLK_SYSIN { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <30000000>; + clock-output-names = "CLK_SYSIN"; + }; + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: arm_periph_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <600000000>; + }; + + /* + * Bootloader initialized system infrastructure clock for + * serial devices. + */ + CLK_S_ICN_REG_0: clockgenA0@4 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + clock-output-names = "CLK_S_ICN_REG_0"; + }; + }; +}; |