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authorSimon Horman <horms+renesas@verge.net.au>2016-03-15 09:26:34 +0900
committerSimon Horman <horms+renesas@verge.net.au>2016-04-20 08:56:35 +1000
commit9f1c1a2c784d28d45d0cd18a44e45ddd15d7458f (patch)
tree549ea66350545a399fa9cb373a56a17b6a760a21 /arch/arm/boot/dts/r8a7794.dtsi
parente980f9418f45a3c0d53e54bc17bd48406060c2bb (diff)
ARM: dts: r8a7794: add CAN nodes to device tree
Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Diffstat (limited to 'arch/arm/boot/dts/r8a7794.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 2d8835bdf3f6..a1ee2a82c3c0 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -830,6 +830,28 @@
};
};
+ can0: can@e6e80000 {
+ compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e80000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7794_CLK_RCAN0>,
+ <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ can1: can@e6e88000 {
+ compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
+ reg = <0 0xe6e88000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7794_CLK_RCAN1>,
+ <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
clocks {
#address-cells = <2>;
#size-cells = <2>;