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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2016-07-27 23:59:59 +0300
committerSimon Horman <horms+renesas@verge.net.au>2016-08-09 14:36:56 +0200
commit2a29f9d6fea82485941449c2328af5b2a4ea636f (patch)
treeaf4796394bf5e4d2b1af7d52dad68730af8bfef6 /arch/arm/boot/dts/r8a7794.dtsi
parent0b1f0e374404f70b77c0f79c6f16fdcf5484552b (diff)
ARM: dts: r8a7794: add MSTP5 clocks
Add some MSTP5 clocks to the R8A7794 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7794.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 5d1fded79633..1c2d3846d70e 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -1204,6 +1204,15 @@
clock-indices = <R8A7794_CLK_IRQC>;
clock-output-names = "irqc";
};
+ mstp5_clks: mstp5_clks@e6150144 {
+ compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
+ clocks = <&hp_clk>, <&extal_clk>, <&p_clk>;
+ #clock-cells = <1>;
+ clock-indices = <R8A7794_CLK_AUDIO_DMAC0
+ R8A7794_CLK_PWM>;
+ clock-output-names = "audmac0", "pwm";
+ };
mstp7_clks: mstp7_clks@e615014c {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;