diff options
| author | Andrey Gusakov <andrey.gusakov@cogentembedded.com> | 2014-12-18 23:43:03 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2014-12-23 09:18:23 +0900 |
| commit | 7408d3061d2f04181820902fae6e92e4a73d5cc0 (patch) | |
| tree | ba11de82bccd5834c3ac1c165b82858233f1dd94 /arch/arm/boot/dts/r8a7791.dtsi | |
| parent | f6b5dd4088d082b53eb135e1d6b4b213bf5ce127 (diff) | |
ARM: shmobile: r8a7791: add MLB+ clock
Add MLB+ clock to R8A7791 device tree.
Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
[Sergei: rebased, renamed, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7791.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 78d637135e77..28102265cc71 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1154,17 +1154,17 @@ mstp8_clks: mstp8_clks@e6150990 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; - clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, - <&zs_clk>, <&zs_clk>; + clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, + <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; clock-indices = < - R8A7791_CLK_IPMMU_SGX + R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 >; clock-output-names = - "ipmmu_sgx", "vin2", "vin1", "vin0", "ether", "sata1", - "sata0"; + "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", "ether", + "sata1", "sata0"; }; mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |