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authorMagnus Damm <damm@opensource.se>2013-03-29 17:49:37 +0900
committerSimon Horman <horms+renesas@verge.net.au>2013-04-03 10:50:43 +0900
commit3cc828fdb32281cc8166d3a40bee32b90ce3cad8 (patch)
treee746b6b78ef65353b20839c18e9ee5cc519f4a4c /arch/arm/boot/dts/r8a7790-lager.dts
parent15351a7a22c207b2e9ce83b01782a2324006014a (diff)
ARM: shmobile: Initial r8a7790 Lager board support
Lager base board support making use of 2 GiB of memory, the r8a7790 SoC with the SCIF0 serial port and CA15 with ARM architected timer. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790-lager.dts')
-rw-r--r--arch/arm/boot/dts/r8a7790-lager.dts31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
new file mode 100644
index 000000000000..09a84fce89d6
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -0,0 +1,31 @@
+/*
+ * Device Tree Source for the Lager board
+ *
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+/include/ "r8a7790.dtsi"
+
+/ {
+ model = "Lager";
+ compatible = "renesas,lager", "renesas,r8a7790";
+
+ chosen {
+ bootargs = "console=ttySC6,115200 ignore_loglevel";
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0 0x40000000 0 0x80000000>;
+ };
+
+ lbsc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+};