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authorBoris Brezillon <boris.brezillon@free-electrons.com>2015-08-18 10:09:00 +0200
committerGregory CLEMENT <gregory.clement@free-electrons.com>2015-10-09 17:08:01 +0200
commiteb69e001983d16f5897ad0b0c8e15d06eecab01d (patch)
treec62bd97148b84b49adcf28e8d8354dc6085f82df /arch/arm/boot/dts/orion5x.dtsi
parentd716f2e837ac6cdf3244130ca3abc1e560048941 (diff)
ARM: mvebu: use new bindings for existing crypto devices
The new bindings split the crypto and sram node in two separate devices. Modify the existing crypto nodes to match the new representation. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/orion5x.dtsi')
-rw-r--r--arch/arm/boot/dts/orion5x.dtsi22
1 files changed, 15 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi
index 75cd01bd6024..e1b6d2a2ac49 100644
--- a/arch/arm/boot/dts/orion5x.dtsi
+++ b/arch/arm/boot/dts/orion5x.dtsi
@@ -212,6 +212,16 @@
status = "disabled";
};
+ cesa: crypto@90000 {
+ compatible = "marvell,orion-crypto";
+ reg = <0x90000 0x10000>;
+ reg-names = "regs";
+ interrupts = <28>;
+ marvell,crypto-srams = <&crypto_sram>;
+ marvell,crypto-sram-size = <0x800>;
+ status = "okay";
+ };
+
ehci1: ehci@a0000 {
compatible = "marvell,orion-ehci";
reg = <0xa0000 0x1000>;
@@ -220,13 +230,11 @@
};
};
- cesa: crypto@90000 {
- compatible = "marvell,orion-crypto";
- reg = <MBUS_ID(0xf0, 0x01) 0x90000 0x10000>,
- <MBUS_ID(0x09, 0x00) 0x0 0x800>;
- reg-names = "regs", "sram";
- interrupts = <28>;
- status = "okay";
+ crypto_sram: sa-sram {
+ compatible = "mmio-sram";
+ reg = <MBUS_ID(0x09, 0x00) 0x0 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
};
};
};