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authorKrzysztof Kozlowski <krzk@kernel.org>2016-05-03 13:55:46 +0200
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>2016-05-31 11:47:55 +0200
commitb98485030d165c60f46f1b768043e9dca5db2678 (patch)
treec4384b05653711f226f4c4a8fb8f40b6cfd997c0 /arch/arm/boot/dts/exynos5420-pinctrl.dtsi
parent7b336fc88b9e2c981aeb3da33b2d7b4bc1f910f0 (diff)
ARM: dts: exynos: Re-order alphabetically Exynos5420 SD0/SD1 pinctrl nodes
The 'sd0_rclk' was put in the middle of SD1 nodes. Remove the confusion. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos5420-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5420-pinctrl.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index 130563b2ca95..14beb7e07323 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -193,17 +193,17 @@
samsung,pin-drv = <3>;
};
- sd1_clk: sd1-clk {
- samsung,pins = "gpc1-0";
+ sd0_rclk: sd0-rclk {
+ samsung,pins = "gpc0-7";
samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
+ samsung,pin-pud = <1>;
samsung,pin-drv = <3>;
};
- sd0_rclk: sd0-rclk {
- samsung,pins = "gpc0-7";
+ sd1_clk: sd1-clk {
+ samsung,pins = "gpc1-0";
samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
+ samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};