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authorDave Gerlach <d-gerlach@ti.com>2016-05-10 14:49:42 -0500
committerTony Lindgren <tony@atomide.com>2016-06-10 04:58:06 -0700
commitfae3a9f023b7903be3d84ae81014b061508480f9 (patch)
treed4be8760fd79961746d9e39b34995eb943a4d2ca /arch/arm/boot/dts/dra7.dtsi
parenta5fa09b6943f3304c2a7b2670c896c485fba8cf4 (diff)
ARM: dts: dra7: Add ti,secure-ram node to ocmcram1 node
Secure variants of DRA7xx and AM57xx SoCs may need to reserve a region of the SRAM for use by secure software. To account for this, add a child node to the ocmcram1 node that will act as a placeholder at the start of the SRAM for the reserved region of memory that may be required by secure services. The node is added with size 0 so that by default parts will have the full space available but the bootloader or board dts file is able to resize the node as needed depending on how much reserved space is needed, if any, so end users of the ocmcram1 region on HS parts must be aware that a smaller amount of SRAM than expected may be available. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7.dtsi')
-rw-r--r--arch/arm/boot/dts/dra7.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 4847ef9780cc..d8c0dd1024f0 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -310,6 +310,21 @@
ranges = <0x0 0x40300000 0x80000>;
#address-cells = <1>;
#size-cells = <1>;
+ /*
+ * This is a placeholder for an optional reserved
+ * region for use by secure software. The size
+ * of this region is not known until runtime so it
+ * is set as zero to either be updated to reserve
+ * space or left unchanged to leave all SRAM for use.
+ * On HS parts that that require the reserved region
+ * either the bootloader can update the size to
+ * the required amount or the node can be overridden
+ * from the board dts file for the secure platform.
+ */
+ sram-hs@0 {
+ compatible = "ti,secure-ram";
+ reg = <0x0 0x0>;
+ };
};
/*