summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/bcm63138.dtsi
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2019-06-25 04:15:53 -0700
committerOlof Johansson <olof@lixom.net>2019-06-25 04:15:53 -0700
commit98d70a5cd929081e605b2983550a893d6540e955 (patch)
tree2a8cf743663b94f3c675d513c79137ac824a95e3 /arch/arm/boot/dts/bcm63138.dtsi
parent4ed7e4e57822d01d887d3eec7e10d8e50c39dd43 (diff)
parentdfa84bb99285b4335e5b2a23b772991362e47ee6 (diff)
Merge tag 'arm-soc/for-5.3/devicetree-v2' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contain Broadcom ARM-based SoCs Device Tree changes for 5.3 please pull the following: - Lukas enables DMA support for the BCM2835 (Raspberry Pi) SPI controller - Florian fixes a number of dtc W=1 warnings in the Broadcom DTS files and provides a fix for devices failing to boot after the removal of skelton.dtsi (that commit has been submitted as a separate fix) * tag 'arm-soc/for-5.3/devicetree-v2' of https://github.com/Broadcom/stblinux: ARM: dts: BCM5301X: Fix most DTC W=1 warnings ARM: dts: NSP: Fix the bulk of W=1 DTC warnings ARM: dts: BCM63xx: Fix DTC W=1 warnings ARM: dts: BCM53573: Fix DTC W=1 warnings ARM: dts: bcm-mobile: Fix most DTC W=1 warnings ARM: dts: Cygnus: Fix most DTC W=1 warnings ARM: dts: Fix BCM7445 DTC warnings ARM: bcm283x: Enable DMA support for SPI controller ARM: dts: bcm: Add missing device_type = "memory" property Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/bcm63138.dtsi')
-rw-r--r--arch/arm/boot/dts/bcm63138.dtsi9
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
index e6a41e1b27fd..9c0325cf9e22 100644
--- a/arch/arm/boot/dts/bcm63138.dtsi
+++ b/arch/arm/boot/dts/bcm63138.dtsi
@@ -41,9 +41,6 @@
};
clocks {
- #address-cells = <1>;
- #size-cells = <0>;
-
/* UBUS peripheral clock */
periph_clk: periph_clk {
#clock-cells = <0>;
@@ -94,7 +91,7 @@
reg = <0x1e000 0x100>;
};
- gic: interrupt-controller@1e100 {
+ gic: interrupt-controller@1f000 {
compatible = "arm,cortex-a9-gic";
reg = <0x1f000 0x1000
0x1e100 0x100>;
@@ -125,7 +122,7 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
- armpll: armpll {
+ armpll: armpll@20000 {
#clock-cells = <0>;
compatible = "brcm,bcm63138-armpll";
clocks = <&periph_clk>;
@@ -144,7 +141,7 @@
#reset-cells = <2>;
};
- ahci: sata@8000 {
+ ahci: sata@a000 {
compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
reg = <0xa000 0x9ac>, <0x8040 0x24>;