diff options
author | Arnd Bergmann <arnd@arndb.de> | 2014-11-28 22:34:33 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2014-11-28 22:34:33 +0100 |
commit | 2f84411d9f3f93057e71d1480e8768ed7c5b3274 (patch) | |
tree | 34ee647798536412d332022f39de56ae79fab4f0 /arch/arm/boot/dts/armada-370-rd.dts | |
parent | b6072143e53b2e23ca3f0d404efd7b14f1456e7f (diff) | |
parent | 623394def7ef023aa44e338de680222cdc93c4a5 (diff) |
Merge tag 'mvebu-dt-usb-phy-3.19-3' of git://git.infradead.org/linux-mvebu into next/dt2
Pull "mvebu DT changes for v3.19 (round 3)" from Jason Cooper:
- Armada 375
- Add PHY and USB cluster controller support
* tag 'mvebu-dt-usb-phy-3.19-3' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add PHY support to the dts for the USB controllers on Armada 375
ARM: mvebu: add Device Tree description of USB cluster controller on Armada 375
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/armada-370-rd.dts')
-rw-r--r-- | arch/arm/boot/dts/armada-370-rd.dts | 73 |
1 files changed, 56 insertions, 17 deletions
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index f57a8f841498..394308951ed9 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -59,18 +59,6 @@ }; internal-regs { - pinctrl { - fan_pins: fan-pins { - marvell,pins = "mpp8"; - marvell,function = "gpio"; - }; - - led_pins: led-pins { - marvell,pins = "mpp32"; - marvell,function = "gpio"; - }; - }; - serial@12000 { status = "okay"; }; @@ -85,10 +73,6 @@ phy0: ethernet-phy@0 { reg = <0>; }; - - phy1: ethernet-phy@1 { - reg = <1>; - }; }; ethernet@70000 { @@ -100,8 +84,11 @@ pinctrl-0 = <&ge1_rgmii_pins>; pinctrl-names = "default"; status = "okay"; - phy = <&phy1>; phy-mode = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; }; mvsdio@d4000 { @@ -173,4 +160,56 @@ }; }; }; + + dsa@0 { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; + + dsa,ethernet = <ð1>; + dsa,mii-bus = <&mdio>; + + switch@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10 0>; /* MDIO address 16, switch 0 in tree */ + + port@0 { + reg = <0>; + label = "lan0"; + }; + + port@1 { + reg = <1>; + label = "lan1"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + port@3 { + reg = <3>; + label = "lan3"; + }; + + port@5 { + reg = <5>; + label = "cpu"; + }; + }; + }; }; + +&pinctrl { + fan_pins: fan-pins { + marvell,pins = "mpp8"; + marvell,function = "gpio"; + }; + + led_pins: led-pins { + marvell,pins = "mpp32"; + marvell,function = "gpio"; + }; +}; |