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authorAlexey Brodkin <abrodkin@synopsys.com>2017-03-29 17:15:11 +0300
committerVineet Gupta <vgupta@synopsys.com>2017-03-30 17:32:33 -0700
commitc70c473396cbdec1168a6eff60e13029c0916854 (patch)
treeced20274a6deba743926be0d9d67ec8c379707c6 /arch/arc/include
parentae9955aeb8e47c4f60a02add47acf9850ca0ead7 (diff)
ARCv2: SLC: Make sure busy bit is set properly on SLC flushing
As reported in STAR 9001165532, an SLC control reg read (for checking busy state) right after SLC invalidate command may incorrectly return NOT busy causing software to NOT spin-wait while operation is underway. (and for some reason this only happens if L1 cache is also disabled - as required by IOC programming model) Suggested workaround is to do an additional Control Reg read, which ensures the 2nd read gets the right status. Cc: stable@vger.kernel.org #4.10 Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> [vgupta: reworte changelog a bit] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include')
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