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authorWanpeng Li <wanpengli@tencent.com>2020-07-31 11:12:20 +0800
committerPaolo Bonzini <pbonzini@redhat.com>2020-07-31 03:21:03 -0400
commita445fc457d2886a1264ec09c34f4000d1b30784d (patch)
tree52f83c08c2b38281491d5a0f1bc844ad59bae214 /arch/alpha/lib/fpreg.c
parent83013059bdc5486dcbcd33b5c4abf8431766e06c (diff)
KVM: LAPIC: Set the TDCR settable bits
It is a little different between Intel and AMD, Intel's bit 2 is 0 and AMD is reserved. On bare-metal, Intel will refuse to set APIC_TDCR once bits except 0, 1, 3 are setting, however, AMD will accept bits 0, 1, 3 and ignore other bits setting as patch does. Before the patch, we can get back anything what we set to the APIC_TDCR, this patch improves it. Signed-off-by: Wanpeng Li <wanpengli@tencent.com> Message-Id: <1596165141-28874-2-git-send-email-wanpengli@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/alpha/lib/fpreg.c')
0 files changed, 0 insertions, 0 deletions