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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2014-05-06 14:56:50 +0300
committerJani Nikula <jani.nikula@intel.com>2014-05-07 15:01:49 +0300
commiteeb6324dd6668b05192708916f2a4bc463f382ca (patch)
treee2d2e8760f2af89a0e43febd29e11587b431ea5d /README
parent2a1235e53bed8fa111e1c1ee2e7d8d91efa71ebc (diff)
drm/i915: consider the source max DP lane count too
Even if the panel claims it can support 4 lanes, there's the possibility that the HW can't, so consider this while selecting the max lane count. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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