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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-03-30 21:04:13 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-04-01 10:06:00 +0900 |
commit | 6b1a9a02c72fdb6e1d67949bb01b66e07d88ace9 (patch) | |
tree | 642a738532be01b8568acbe50b37d587fe8031d2 /Makefile | |
parent | 0209987fc81c8118e9fc99a115a45b273e8acc75 (diff) |
kbuild: pass $(MAKECMDGOALS) to sub-make as is
Manipulating $(MAKECMDGOALS) for sub-make seems odd to me.
[1] 'make O=foo sub-make' is turned into 'make O=foo', which builds
the default targets. It would make sense to terminate the build with:
*** No rule to make target 'sub-make'. Stop.
[2] 'make O=foo defconfig _all' is turned into 'make O=foo defconfig',
which changes the behavior.
Let's pass $(MAKECMDGOALS) as is.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'Makefile')
-rw-r--r-- | Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -168,7 +168,7 @@ $(filter-out _all sub-make $(lastword $(MAKEFILE_LIST)), $(MAKECMDGOALS)) _all: sub-make: $(Q)$(MAKE) \ $(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \ - -f $(CURDIR)/Makefile $(filter-out _all sub-make,$(MAKECMDGOALS)) + -f $(CURDIR)/Makefile $(MAKECMDGOALS) endif # need-sub-make endif # sub_make_done |