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authorRobert Hancock <robert.hancock@calian.com>2020-10-28 11:14:29 -0600
committerJakub Kicinski <kuba@kernel.org>2020-10-31 14:13:46 -0700
commit1a02556086fc0eb16e0a0d09043e9ffb0e31c7db (patch)
treebd2aa63f46e6c8c38edb02644927bcd8de6dfed4 /Makefile
parent624251b4b5a0c3261ce0d3f9031e26c553e9e13a (diff)
net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode
Update the axienet driver to properly support the Xilinx PCS/PMA PHY component which is used for 1000BaseX and SGMII modes, including properly configuring the auto-negotiation mode of the PHY and reading the negotiated state from the PHY. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Link: https://lore.kernel.org/r/20201028171429.1699922-1-robert.hancock@calian.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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