diff options
author | Dong Aisheng <aisheng.dong@nxp.com> | 2018-12-13 07:07:57 +0000 |
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committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2019-07-24 10:31:55 +0200 |
commit | 9d733992772dc04ce5e8839f867b4ff83ee75c34 (patch) | |
tree | f4fd1fceabb096845aff282aa7a156c8d073b831 /Documentation | |
parent | ca10989632d8820749fad37e13843750198e450a (diff) |
dt-bindings: can: flexcan: add PE clock source property to device tree
The FlexCAN controller can parse clock source property from DTS file to
select PE clock source.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt index bc77477c6878..a04168605998 100644 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt @@ -32,6 +32,13 @@ Optional properties: ack_gpr is the gpr register offset of CAN stop acknowledge. ack_bit is the bit offset of CAN stop acknowledge. +- fsl,clk-source: Select the clock source to the CAN Protocol Engine (PE). + It's SoC Implementation dependent. Refer to RM for detailed + definition. If this property is not set in device tree node + then driver selects clock source 1 by default. + 0: clock source 0 (oscillator clock) + 1: clock source 1 (peripheral clock) + Example: can@1c000 { @@ -40,4 +47,5 @@ Example: interrupts = <48 0x2>; interrupt-parent = <&mpic>; clock-frequency = <200000000>; // filled in by bootloader + fsl,clk-source = <0>; // select clock source 0 for PE }; |