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| author | Joakim Zhang <qiangqing.zhang@nxp.com> | 2020-10-20 23:53:56 +0800 |
|---|---|---|
| committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2020-11-03 22:30:33 +0100 |
| commit | 91a22bfe928fe2ef975580cbcc75e233bc4fe0d0 (patch) | |
| tree | 6c1f65463eb6a84b84acb68b0fd22974f2d8f870 /Documentation | |
| parent | 018799649071a1638c0c130526af36747df4355a (diff) | |
can: flexcan: add ECC initialization for LX2160A
After double check with Layerscape CAN owner (Pankaj Bansal), confirm
that LX2160A indeed supports ECC feature, so correct the feature table.
For SoCs with ECC supported, even use FLEXCAN_QUIRK_DISABLE_MECR quirk to
disable non-correctable errors interrupt and freeze mode, had better use
FLEXCAN_QUIRK_SUPPORT_ECC quirk to initialize all memory.
Fixes: 2c19bb43e5572 ("can: flexcan: add lx2160ar1 support")
Cc: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Link: https://lore.kernel.org/r/20201020155402.30318-5-qiangqing.zhang@nxp.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions