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authorEvan Green <evgreen@chromium.org>2019-03-21 10:17:53 -0700
committerKishon Vijay Abraham I <kishon@ti.com>2019-04-17 14:12:53 +0530
commit8de4acd397ab96bf3487c6a765fd2b76e2863909 (patch)
tree1c059565880ea2162259b4c61398251f5fa57e9f /Documentation
parent36077e16c050d1b063cdfec8c1d38d51d112f86d (diff)
dt-bindings: ufs: Add #reset-cells for Qualcomm controllers
Enable Qualcomm UFS controllers to expose the PHY reset via a reset controller. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
index 5111e9130bc3..f647c09bc62a 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -50,6 +50,8 @@ Optional properties:
-lanes-per-direction : number of lanes available per direction - either 1 or 2.
Note that it is assume same number of lanes is used both
directions at once. If not specified, default is 2 lanes per direction.
+- #reset-cells : Must be <1> for Qualcomm UFS controllers that expose
+ PHY reset from the UFS controller.
- resets : reset node register
- reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP.
@@ -79,4 +81,5 @@ Example:
reset-names = "rst";
phys = <&ufsphy1>;
phy-names = "ufsphy";
+ #reset-cells = <1>;
};