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authorZhen Lei <thunder.leizhen@huawei.com>2020-10-12 14:12:24 +0800
committerRob Herring <robh@kernel.org>2020-10-12 13:48:31 -0500
commit879baf11777cdfa5a04c266c7a987907887c7443 (patch)
tree6f517e3a2f900082bb9d4cb83cd06d9b1a53ea36 /Documentation
parenta5917fa876946f54566a59ab59a746efc8d50226 (diff)
dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml
Add properties: #reset-cells, #address-cells, #size-cells and ranges. Due to the Hisilicon system controller node may contains child nodes, change the value of "additionalProperties" from "false" to "type: object". The examples have also been updated. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Link: https://lore.kernel.org/r/20201012061225.1597-10-thunder.leizhen@huawei.com Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml28
1 files changed, 25 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
index 449140f89ddb..5a53d433b6f0 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
@@ -71,21 +71,43 @@ properties:
'#clock-cells':
const: 1
+ '#reset-cells':
+ const: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+ ranges: true
+
required:
- compatible
- reg
-additionalProperties: false
+additionalProperties:
+ type: object
examples:
- |
/* Hisilicon system controller */
- system-controller@fc802000 {
+ system-controller@802000 {
compatible = "hisilicon,sysctrl", "syscon";
- reg = <0xfc802000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x802000 0x1000>;
+ reg = <0x802000 0x1000>;
+
smp-offset = <0x31c>;
resume-offset = <0x308>;
reboot-offset = <0x4>;
+
+ clock: clock@0 {
+ compatible = "hisilicon,hi3620-clock";
+ reg = <0 0x10000>;
+ #clock-cells = <1>;
+ };
};
/* HiP01 system controller */