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authorAndrzej Pietrasiewicz <andrzej.p@samsung.com>2018-05-09 10:59:26 +0200
committerInki Dae <inki.dae@samsung.com>2018-05-10 08:53:23 +0900
commit01fb9185dc180940f90510215ef8764d6155d088 (patch)
tree9a04da747a97587c1626788c31d9d156e4937e58 /Documentation
parent7a2d5c77c55847f31945e5aa8337db2218a5a7c1 (diff)
drm/exynos: Add driver for Exynos Scaler module
Exynos Scaler is a hardware module, which processes graphic data fetched from memory and transfers the resultant dato another memory buffer. Graphics data can be up/down-scaled, rotated, flipped and converted color space. Scaler hardware modules are a part of Exynos5420 and newer Exynos SoCs. Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/gpu/samsung-scaler.txt27
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpu/samsung-scaler.txt b/Documentation/devicetree/bindings/gpu/samsung-scaler.txt
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+++ b/Documentation/devicetree/bindings/gpu/samsung-scaler.txt
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+* Samsung Exynos Image Scaler
+
+Required properties:
+ - compatible : value should be one of the following:
+ (a) "samsung,exynos5420-scaler" for Scaler IP in Exynos5420
+ (b) "samsung,exynos5433-scaler" for Scaler IP in Exynos5433
+
+ - reg : Physical base address of the IP registers and length of memory
+ mapped region.
+
+ - interrupts : Interrupt specifier for scaler interrupt, according to format
+ specific to interrupt parent.
+
+ - clocks : Clock specifier for scaler clock, according to generic clock
+ bindings. (See Documentation/devicetree/bindings/clock/exynos*.txt)
+
+ - clock-names : Names of clocks. For exynos scaler, it should be "mscl"
+ on 5420 and "pclk", "aclk" and "aclk_xiu" on 5433.
+
+Example:
+ scaler@12800000 {
+ compatible = "samsung,exynos5420-scaler";
+ reg = <0x12800000 0x1294>;
+ interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_MSCL0>;
+ clock-names = "mscl";
+ };