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| author | Christoffer Dall <christoffer.dall@linaro.org> | 2013-09-23 14:55:56 -0700 |
|---|---|---|
| committer | Christoffer Dall <christoffer.dall@linaro.org> | 2013-12-21 10:01:27 -0800 |
| commit | 0307e1770fdeff2732cf7a35d0f7f49db67c6621 (patch) | |
| tree | 199483e6e2745bbaf9966f17975f439bba8e7617 /Documentation/networking/x25.txt | |
| parent | ce01e4e8874d410738f4b4733b26642d6611a331 (diff) | |
irqchip: arm-gic: Define additional MMIO offsets and masks
Define CPU interface offsets for the GICC_ABPR, GICC_APR, and GICC_IIDR
registers. Define distributor registers for the GICD_SPENDSGIR and the
GICD_CPENDSGIR. KVM/ARM needs to know about these definitions to fully
support save/restore of the VGIC.
Also define some masks and shifts for the various GICH_VMCR fields.
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'Documentation/networking/x25.txt')
0 files changed, 0 insertions, 0 deletions