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author | Lukas Wunner <lukas@wunner.de> | 2016-10-28 10:52:06 +0200 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-11-17 18:47:38 -0600 |
commit | 6ef13824e0d897858ea4510a2c61b00445922fad (patch) | |
tree | c9394eac9f743e4c6bafc885261253740051b4a5 /Documentation/mips | |
parent | 718a0609ae263b291848ecd0fa88bcf15ad49280 (diff) |
ACPI / hotplug / PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit
We cache the PCI_EXP_SLTCAP_HPC bit in pci_dev->is_hotplug_bridge on device
probe, so there's no need to read it again when adding the ACPI hotplug
context.
Here's the call chain to prove that no ordering issue is introduced:
pci_scan_child_bus [drivers/pci/probe.c]
pci_scan_slot
pci_scan_single_device
pci_scan_device
pci_setup_device
set_pcie_hotplug_bridge
[is_hotplug_bridge bit is set here]
pci_scan_bridge
pci_add_new_bus
pci_alloc_child_bus
pcibios_add_bus [arch/(x86|arm64|ia64)/...]
acpi_pci_add_bus [drivers/pci/pci-acpi.c]
acpiphp_enumerate_slots [drivers/pci/hotplug/acpiphp_glue.c]
acpiphp_add_context
device_is_managed_by_native_pciehp
[is_hotplug_bridge bit is queried here]
No functional change intended.
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'Documentation/mips')
0 files changed, 0 insertions, 0 deletions