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authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>2019-11-14 14:15:19 -0600
committerPaolo Bonzini <pbonzini@redhat.com>2020-02-05 15:17:44 +0100
commitf458d039db7e8518041db4169d657407e3217008 (patch)
tree695376329214f1f3bd71da2989a9d837387046fa /Documentation/i2c/smbus-protocol.rst
parent1ec2405c7cbf3afa7598c6b7546c81aa0cac78dc (diff)
kvm: ioapic: Lazy update IOAPIC EOI
In-kernel IOAPIC does not receive EOI with AMD SVM AVIC since the processor accelerate write to APIC EOI register and does not trap if the interrupt is edge-triggered. Workaround this by lazy check for pending APIC EOI at the time when setting new IOPIC irq, and update IOAPIC EOI if no pending APIC EOI. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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