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authorRichard Zhu <hongxing.zhu@nxp.com>2019-10-09 16:07:21 +0800
committerJassi Brar <jaswinder.singh@linaro.org>2019-11-30 23:09:14 -0600
commitc6c6bc6ea9fce31baaca053befc31215cfcb3dd9 (patch)
treeab6c007954920148ca43dafb856e2a16b20009a8 /Documentation/dontdiff
parent58340e7d779ef849efaca664a50f225a53b27a2c (diff)
mailbox: imx: add support for imx v1 mu
There is a version 1.0 MU on i.MX7ULP platform. One new version ID register is added, and it's offset is 0. TRn registers are defined at the offset 0x20 ~ 0x2C. RRn registers are defined at the offset 0x40 ~ 0x4C. SR/CR registers are defined at 0x60/0x64. Extend this driver to support it. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Suggested-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
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