diff options
author | Huang Rui <ray.huang@amd.com> | 2014-10-28 19:54:31 +0800 |
---|---|---|
committer | Felipe Balbi <balbi@ti.com> | 2014-11-03 10:03:37 -0600 |
commit | 41c06ffdf9cc63edd875cc8ff8ae002cd9b14f96 (patch) | |
tree | 5b0b161153620e1ab3fbe35ff14631794be3dd6e /Documentation/devicetree/bindings/usb/dwc3.txt | |
parent | a2a1d0f5838d6aa0d1306ef9bb1011f501faa695 (diff) |
usb: dwc3: add delay phy power change quirk
This patch adds delay PHY power change from P0 to P1/P2/P3 when link state
changing from U0 to U1/U2/U3 respectively, and some special platforms can
configure that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/usb/dwc3.txt')
-rw-r--r-- | Documentation/devicetree/bindings/usb/dwc3.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 4c77ed6e7c07..a2598d3c7c12 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -24,6 +24,8 @@ Optional properties: P1/P2/P3 transition sequence. - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain amount of 8B10B errors occur. + - snps,del_phy_power_chg_quirk: when set core will delay PHY power change + from P0 to P1/P2/P3. This is usually a subnode to DWC3 glue to which it is connected. |