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authorRamuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>2020-11-24 12:18:40 +0800
committerMark Brown <broonie@kernel.org>2021-01-13 11:37:05 +0000
commitfcebca39938fa9f6ed03f27fc75645ad7fd489e9 (patch)
tree1dfa560e8d80fa33e2f9677e4ed3eba039928183 /Documentation/devicetree/bindings/spi
parenteb4aadc31ef4224b926d5165048cb297f4bda34f (diff)
dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi
Add new vendor specific compatible string to check Intel's Lightning Mountain(LGM) QSPI features enablement in cadence-quadspi driver. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201124041840.31066-6-vadivel.muruganx.ramuthevar@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
-rw-r--r--Documentation/devicetree/bindings/spi/cadence-quadspi.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt b/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
index 945be7d5b236..8ace832a2d80 100644
--- a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
+++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
@@ -5,6 +5,7 @@ Required properties:
Generic default - "cdns,qspi-nor".
For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor".
+ For Intel LGM SoC - "intel,lgm-qspi", "cdns,qspi-nor".
- reg : Contains two entries, each of which is a tuple consisting of a
physical address and length. The first entry is the address and
length of the controller register set. The second entry is the