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author | Murali Karicheri <m-karicheri2@ti.com> | 2015-06-10 03:23:42 -0400 |
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committer | Mark Brown <broonie@kernel.org> | 2015-06-10 18:28:04 +0100 |
commit | e0b047bd8fc73b35ba1081097e0223eb778d982c (patch) | |
tree | bba7b831a8ef4af5f6bfd7083b1e7907db426065 /Documentation/devicetree/bindings/spi | |
parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) |
spi: davinci: change the lower limit of pre-scale divider to 1
SPI hardware spec for Keystone specify a lower value of 0 for pre-scale
divider which determine what max value of spi clock (spi-max-frequency)
the device can support. This translates to a clock divider of 2. So fix
the lower limit value used for the boundary check in
davinci_spi_get_prescale() function to 1 so that a maximum of spi device
clock rate / 2 is possible to be set for spi-max-frequency.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
0 files changed, 0 insertions, 0 deletions