diff options
author | Kamlakant Patel <kamlakant.patel@broadcom.com> | 2015-08-27 17:49:29 +0530 |
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committer | Mark Brown <broonie@kernel.org> | 2015-08-28 18:22:20 +0100 |
commit | bf9628373418328daf67b6508fc3713fc6f5067d (patch) | |
tree | 7b492cd34919c4eb6ada66b7796aafc26ffc68c4 /Documentation/devicetree/bindings/spi/spi-xlp.txt | |
parent | d8c80d49cfa08b83841a3e315fa13dd310bec006 (diff) |
spi: Add DT bindings documentation for Netlogic XLP SPI controller
Add DT bindings documentation for SPI controller driver used by
Netlogic XLP MIPS64 SoCs.
Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi/spi-xlp.txt')
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-xlp.txt | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-xlp.txt b/Documentation/devicetree/bindings/spi/spi-xlp.txt new file mode 100644 index 000000000000..40e82d51efec --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-xlp.txt @@ -0,0 +1,39 @@ +SPI Master controller for Netlogic XLP MIPS64 SOCs +================================================== + +Currently this SPI controller driver is supported for the following +Netlogic XLP SoCs: + XLP832, XLP316, XLP208, XLP980, XLP532 + +Required properties: +- compatible : Should be "netlogic,xlp832-spi". +- #address-cells : Number of cells required to define a chip select address + on the SPI bus. +- #size-cells : Should be zero. +- reg : Should contain register location and length. +- clocks : Phandle of the spi clock +- interrupts : Interrupt number used by this controller. +- interrupt-parent : Phandle of the parent interrupt controller. + +SPI slave nodes must be children of the SPI master node and can contain +properties described in Documentation/devicetree/bindings/spi/spi-bus.txt. + +Example: + + spi: xlp_spi@3a100 { + compatible = "netlogic,xlp832-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x3a100 0x100>; + clocks = <&spi_clk>; + interrupts = <34>; + interrupt-parent = <&pic>; + + spi_nor@1 { + compatible = "spansion,s25sl12801"; + #address-cells = <1>; + #size-cells = <1>; + reg = <1>; /* Chip Select */ + spi-max-frequency = <40000000>; + }; +}; |