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authorJonas Gorski <jonas.gorski@gmail.com>2017-03-01 10:08:13 +0100
committerMark Brown <broonie@kernel.org>2017-03-13 15:51:45 +0000
commit8c0951afd8a7585a4281980b9a21dcc8a419cad9 (patch)
tree1a35543341bbc1d03412aaee22297782abb5065a /Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
parentff18e1ef04e2073889569b07a5ddd54a6527917f (diff)
spi/bcm63xx-hsspi: document bcm63xx HS SPI devicetree bindings
Add documentation for the bindings of the high speed SPI controller found on newer bcm63xx SoCs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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+Binding for Broadcom BCM6328 High Speed SPI controller
+
+Required properties:
+- compatible: must contain of "brcm,bcm6328-hsspi".
+- reg: Base address and size of the controllers memory area.
+- interrupts: Interrupt for the SPI block.
+- clocks: phandles of the SPI clock and the PLL clock.
+- clock-names: must be "hsspi", "pll".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Optional properties:
+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
+ if absent.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+ spi@10001000 {
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10001000 0x600>;
+
+ interrupts = <29>;
+
+ clocks = <&clkctl 9>, <&hsspi_pll>;
+ clock-names = "hsspi", "pll";
+
+ num-cs = <2>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };