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authorDavid Wu <david.wu@rock-chips.com>2017-08-08 23:38:29 +0800
committerThierry Reding <thierry.reding@gmail.com>2017-08-18 17:31:56 +0200
commit27922ff59893e3445f69e397bcd92ae06fa89ca7 (patch)
tree02b9c02ddef44631e13a63e7d7ca62b2a085dae6 /Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
parent1f8736c4e1ee1fd3d933208683a5315f9a9d6b5c (diff)
pwm: rockchip: Add APB and function both clocks support
New PWM module provides two individual clocks for APB clock and function clock. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm/pwm-rockchip.txt')
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-rockchip.txt8
1 files changed, 7 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
index b8be3d09ee26..2350ef918bef 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
@@ -6,7 +6,13 @@ Required properties:
"rockchip,rk3288-pwm": found on RK3288 SoC
"rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
- reg: physical base address and length of the controller's registers
- - clocks: phandle and clock specifier of the PWM reference clock
+ - clocks: See ../clock/clock-bindings.txt
+ - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
+ - There is one clock that's used both to derive the functional clock
+ for the device and as the bus clock.
+ - For newer hardware (rk3328 and future socs): specified by name
+ - "pwm": This is used to derive the functional clock.
+ - "pclk": This is the APB bus clock.
- #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory
for a description of the cell format.