summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
diff options
context:
space:
mode:
authoryuanjian <yuanjian12@hisilicon.com>2016-11-28 17:42:46 +0800
committerThierry Reding <thierry.reding@gmail.com>2016-11-29 16:50:12 +0100
commitd09f00810850dd6e6eac8895b62bc3fc35435431 (patch)
treeb2d659616bbbbb1a05aa652dcf40fe21365fa887 /Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
parent58d5b693637d9963018bcb92fecf858e6899ed49 (diff)
pwm: Add PWM driver for HiSilicon BVT SOCs
Add PWM driver for the PWM controller found on HiSilicon BVT SoCs such as Hi3519V100, Hi3516CV300, etc. The PWM controller is primarily in charge of controlling the P-Iris lens. Reviewed-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Signed-off-by: Jian Yuan <yuanjian12@hisilicon.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm/pwm-hibvt.txt')
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-hibvt.txt21
1 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
new file mode 100644
index 000000000000..fa7849d67836
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
@@ -0,0 +1,21 @@
+Hisilicon PWM controller
+
+Required properties:
+-compatible: should contain one SoC specific compatible string
+ The SoC specific strings supported including:
+ "hisilicon,hi3516cv300-pwm"
+ "hisilicon,hi3519v100-pwm"
+- reg: physical base address and length of the controller's registers.
+- clocks: phandle and clock specifier of the PWM reference clock.
+- resets: phandle and reset specifier for the PWM controller reset.
+- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
+ the cells format.
+
+Example:
+ pwm: pwm@12130000 {
+ compatible = "hisilicon,hi3516cv300-pwm";
+ reg = <0x12130000 0x10000>;
+ clocks = <&crg_ctrl HI3516CV300_PWM_CLK>;
+ resets = <&crg_ctrl 0x38 0>;
+ #pwm-cells = <3>;
+ };