diff options
author | Jiancheng Xue <xuejiancheng@huawei.com> | 2014-07-03 22:28:37 +0800 |
---|---|---|
committer | Kishon Vijay Abraham I <kishon@ti.com> | 2014-07-22 12:46:10 +0530 |
commit | f1876accff7ffb3f3cb91ab86aaa866a5eec3f0a (patch) | |
tree | 29ee8fadbdea8592e18befdb15c230421db350b4 /Documentation/devicetree/bindings/phy | |
parent | f0e2cf7b912522c9c7146d9d6e99d1b0ea5c97c6 (diff) |
Documentation: Document Hisilicon hix5hd2 sata PHY
Add necessary binding documentation SATA PHY on Hisilicon hix5hd2 soc.
Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
-rw-r--r-- | Documentation/devicetree/bindings/phy/hix5hd2-phy.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/hix5hd2-phy.txt b/Documentation/devicetree/bindings/phy/hix5hd2-phy.txt new file mode 100644 index 000000000000..296168b74d24 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/hix5hd2-phy.txt @@ -0,0 +1,22 @@ +Hisilicon hix5hd2 SATA PHY +----------------------- + +Required properties: +- compatible: should be "hisilicon,hix5hd2-sata-phy" +- reg: offset and length of the PHY registers +- #phy-cells: must be 0 +Refer to phy/phy-bindings.txt for the generic PHY binding properties + +Optional Properties: +- hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. +- hisilicon,power-reg: offset and bit number within peripheral-syscon, + register of controlling sata power supply. + +Example: + sata_phy: phy@f9900000 { + compatible = "hisilicon,hix5hd2-sata-phy"; + reg = <0xf9900000 0x10000>; + #phy-cells = <0>; + hisilicon,peripheral-syscon = <&peripheral_ctrl>; + hisilicon,power-reg = <0x8 10>; + }; |