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author | Paul Burton <paul.burton@imgtec.com> | 2017-08-15 12:02:17 -0700 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-08-16 11:38:32 -0500 |
commit | 0d58e6c1b19b30623b5f0a053818bd2c32d61166 (patch) | |
tree | e691f539c9a5adb79b8912087d29dd6560e65273 /Documentation/devicetree/bindings/pci/rockchip-pcie.txt | |
parent | b352baf15b66c5799018104d38f9eb77c7445a34 (diff) |
PCI: Add pci_irqd_intx_xlate()
Legacy PCI INTx interrupts are represented in the PCI_INTERRUPT_PIN
register using the range 1-4, which matches our enum pci_interrupt_pin.
This is however not ideal for an IRQ domain, where with 4 interrupts we
would ideally have a domain of size 4 & hwirq numbers in the range 0-3.
Different PCI host controller drivers have handled this in different ways.
Of those under drivers/pci/ which register an INTx IRQ domain, we have:
- pcie-altera uses the range 1-4 in device trees and an IRQ domain of
size 5 to cover that range, with entry 0 wasted.
- pcie-xilinx & pcie-xilinx-nwl use the range 1-4 in device trees but
register an IRQ domain of size 4, which doesn't cover the hwirq=4/INTD
case leading to that interrupt being broken.
- pci-ftpci100 & pci-aardvark use the range 0-3 in both device trees & as
hwirq numbering in the driver & IRQ domain.
In order to introduce some level of consistency in at least the hwirq
numbering used by the drivers & IRQ domains, this patch introduces a new
pci_irqd_intx_xlate() helper function which drivers using the 1-4 range in
device trees can assign as the xlate callback for their INTx IRQ domain.
This translates the 1-4 range into a 0-3 range, allowing us to use an IRQ
domain of size 4 & avoid a wasted entry. Further patches will make use of
this in drivers to allow them to use an IRQ domain of size 4 for legacy
INTx interrupts without breaking INTD.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/rockchip-pcie.txt')
0 files changed, 0 insertions, 0 deletions