diff options
| author | Niklas Cassel <niklas.cassel@axis.com> | 2016-08-26 00:01:56 +0200 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2016-08-31 10:01:54 -0500 |
| commit | 610e12837425e204d1a3bd0182bcdaff1d660e60 (patch) | |
| tree | 0fded4c2c057472bb17c2351c802f2c80ace98bf /Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt | |
| parent | 5839783247f416901ea4571882cb81f8354c9d2a (diff) | |
bindings: PCI: artpec: correct pci binding example
- Increase config size. When using a PCIe switch,
the previous config size only had room for one device.
- Add bus range. Inherited optional property.
- Map downstream I/O to PCI address 0. We can map it to any
address, but let's be consistent with other drivers.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt index 330a45b5f0b5..5ecaea1e6eee 100644 --- a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt +++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt @@ -24,16 +24,17 @@ Example: compatible = "axis,artpec6-pcie", "snps,dw-pcie"; reg = <0xf8050000 0x2000 0xf8040000 0x1000 - 0xc0000000 0x1000>; + 0xc0000000 0x2000>; reg-names = "dbi", "phy", "config"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; /* downstream I/O */ - ranges = <0x81000000 0 0x00010000 0xc0010000 0 0x00010000 + ranges = <0x81000000 0 0 0xc0002000 0 0x00010000 /* non-prefetchable memory */ - 0x82000000 0 0xc0020000 0xc0020000 0 0x1ffe0000>; + 0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>; num-lanes = <2>; + bus-range = <0x00 0xff>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi"; #interrupt-cells = <1>; |