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authorJerome Brunet <jbrunet@baylibre.com>2018-05-15 11:57:47 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2018-05-21 10:50:45 +0200
commitc5f9ae6cf2a6556399e8e3e1e28fc2af7065c672 (patch)
treec1988e39502e95e81908c2bbdf11f25f7ca1fed1 /Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt
parent0e190fd071ccda260d7b54d2f40c379f28a1237e (diff)
dt-bindings: mmc: meson-gx: add reset
Add the reset to the documentation of the meson-gx mmc controller bindings. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt')
-rw-r--r--Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt
index 5add8d7d855f..13e70409e8ac 100644
--- a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt
+++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt
@@ -20,6 +20,7 @@ Required properties:
"clkin1" - Other parent clock of internal mux
The driver has an internal mux clock which switches between clkin0 and clkin1 depending on the
clock rate requested by the MMC core.
+- resets : phandle of the internal reset line
Example:
@@ -30,4 +31,5 @@ Example:
clocks = <&clkc CLKID_SD_EMMC_A>, <&xtal>, <&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
pinctrl-0 = <&emmc_pins>;
+ resets = <&reset RESET_SD_EMMC_A>;
};